Messages in this thread | | | Date | Tue, 16 Sep 2003 19:10:45 -0700 | From | William Lee Irwin III <> | Subject | Re: linear vs. logical addresses? how does cpu interpret kernel addrs? |
| |
On Tue, Sep 16, 2003 at 06:55:27PM -0700, William Lee Irwin III wrote: >> You might want to look at intel's volume 3. They're kept in dedicated >> registers separate from the pointers and used implicitly.
On Tue, Sep 16, 2003 at 07:07:23PM -0700, Ben Johnson wrote: > I've been reading that too. The problem is that there are 6 segment > selector registers and 4 of those are just for data segments. several > data segments can be in use simultaneously and they can all have > different base addresses and limits. The only explanation I've found so > far about how a segment is chosen is that logical address are 48-bit > values, yet sizeof(void *) == 4. there has to be a way to match up > pointer with a segment, but I am unable to find it so far. (maybe I > need a nap.)
Logical addresses aren't 48-bit; they're just offset from linear (and vice-versa).
The way the extra data segment registers are used is by explicitly qualifying operands with segments.
-- wli - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
| |