lkml.org 
[lkml]   [2003]   [Aug]   [4]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
Date
From
SubjectRe: [Q] Question about memory access
On Mon, Aug 04, 2003 at 10:35:25AM +0100, Gianni Tedesco wrote:
> On Mon, 2003-08-04 at 08:14, Cho, joon-woo wrote:
> > If someone want to transfer large data from some device to memory, he may
> > use DMA method.
> >
> > At this point, i am confused.
> >
> > I think that only one process can access physical memory(RAM) at a time.
>
> The DMA controller is a dedicated piece of hardware that copies the data
> from devices to RAM. This means that other processes can use the CPU
> while the DMA is in progress. That is the whole point of DMA.

Yes, this is called having 2 bus masters, which are the chips that
can use the bus to read and write to memory. What can be done is to
timeshare the bus, for example the cpu accesses memory on odd cycles
and the dma chip does on even cycles.

A more complex design would allow the cpu to access memory on all
cycles, but give the dma chip more priority. This would mean that
a dma transfer would take priority over the cpu. Think about
a sound card reading the sound data to pump it to the speakers,
you would prefer not to have it skip.

Greets, Antonio.

--

1. Dado un programa, siempre tiene al menos un fallo.
2. Dadas varias lineas de codigo, siempre se pueden acortar a menos lineas.
3. Por induccion, todos los programas se pueden
reducir a una linea que no funciona.
-
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/

\
 
 \ /
  Last update: 2005-03-22 13:47    [from the cache]
©2003-2011 Jasper Spaans