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SubjectRe: Lockless file reading wrote:
> On Thu, 28 Aug 2003 00:12:30 +0530, Nagendra Singh Tomar said:
>>Why do u require file locking if there is a *single* writer ?? I don't
>>understand why a 123 written over XXX can result in 1X3.
> You'd be *amazed* at what can go strange (not wrong, just strange) at the
> hardware level. Let's assume for the sake of argument that in your '123' and
> 'XXX', each character represents 4 or 8 or however many bytes wide your memory
> bus is (so "123" is really a 24 byte string). The following can happen
> (especially if your hardware doesn't have cache coherency):
> 1) CPU 0 stores the 24 bytes, and it splits across a cache line boundary.
> The '12' goes in one line, '3' in the next.
> 2) Cache controller 0 does the writeback of '3' first.
> 3) Cache controller 0 starts the writeback of the other cache line,
> and gets the '1' written, still waiting for next memory cycle to write '2'.
> 4) CPU 1 or a DMA device snarfs up the 24 bytes before the '2' gets there.
> '3' got there, '1' got there, '2' will get there the *NEXT* bus cycle.
> 1X3. Whoops.
> Real hardware does this sort of thing all the time. Consider *this* gem from
> the IBM S/370 Principles of Operation (GA22-7000-10, page 5-12):


> In addition, if the format
> *used* to be a %4d that wrote to the last 4 bytes of a page, and somebody nails
> it to be a %8d halfway through, we may or may not get a SEGV when we scribble 4
> bytes onto the next page in memory, even if it's a readonly page we scribbled
> on....

Ah, but the scribble will not take place.

> The description of what order things are seen to happen in runs for 11 pages,
> *not* including special-cases like the above....

BTW you are quoting from my all time favorite book. Conceptual order is
not always the real order and all those mind games.


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