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SubjectRe: 2.6.0-test3-mm1: scheduling while atomic (ext3?)
Alan Cox <alan@lxorguk.ukuu.org.uk> wrote:
>
> Put the likely(pos) in the asm/prefetch for Athlon until someone can
> figure out what is going on with some specific Athlons, 2.6 and certain
> kernels (notably 4G/4G).

<riffles through random config options>

Like this?

What happens if someone runs a K6 kernel on a K7?

Or various other CPU types? What is the matrix here?

I don't like the way this is headed...

--- 25/include/asm-i386/processor.h~athlon-prefetch-fix 2003-08-13 04:21:01.000000000 -0700
+++ 25-akpm/include/asm-i386/processor.h 2003-08-13 04:22:10.000000000 -0700
@@ -568,6 +568,10 @@ static inline void rep_nop(void)
#define ARCH_HAS_PREFETCH
extern inline void prefetch(const void *x)
{
+#ifdef CONFIG_MK7
+ if (unlikely(x == NULL))
+ return; /* athlons like to oops in prefetch(0) */
+#endif
alternative_input(ASM_NOP4,
"prefetchnta (%1)",
X86_FEATURE_XMM,
_

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