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SubjectRE: Updated MSI Patches
Date
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Salability means many things. I'm not sure which aspect you are talking
about, but a good thing with MSI is that it does not depend on I/O
APICs. A typical I/O APIC has 24 RTEs, and we need about 10 I/O APICs to
consume the vectors.

You can make this scale on SMP systems. The vector-based approach would
be easier to extend it per-CPU because vectors are inherently per-CPU,
compared with IRQ-based. Today we have IRQ balancing as you know, and
the key part is to bind IRQ to a particular CPU (BTW, with our patch it
happens automatically because the balancer does not care if they are IRQ
or vector).

Thanks,
Jun

> -----Original Message-----
> From: Zwane Mwaikambo [mailto:zwane@linuxpower.ca]
> Sent: Tuesday, August 12, 2003 5:49 PM
> To: Nakajima, Jun
> Cc: Jeff Garzik; Nguyen, Tom L; Linux Kernel; long
> Subject: RE: Updated MSI Patches
>
> On Tue, 12 Aug 2003, Nakajima, Jun wrote:
>
> > static unsigned int startup_edge_ioapic_vector(unsigned int vector)
> > {
> > int was_pending = 0;
> > unsigned long flags;
> > int irq = vector_to_irq (vector);
> >
> > spin_lock_irqsave(&ioapic_lock, flags);
> > if (irq < 16) {
> > disable_8259A_irq(irq);
> > if (i8259A_irq_pending(irq))
> > was_pending = 1;
> > }
> > __unmask_IO_APIC_irq(irq);
> > spin_unlock_irqrestore(&ioapic_lock, flags);
> >
> > return was_pending;
> > }
>
> Hmm that doesn't look too bad, i like, ok another question, do you
think
> this could be made to scale on systems with lots of devices requiring
> vectors?
>
> Thanks,
> Zwane

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