Messages in this thread | | | Subject | Re: [PATCH] idle using PNI monitor/mwait | From | Alan Cox <> | Date | 09 Jul 2003 11:59:47 +0100 |
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On Maw, 2003-07-08 at 22:23, Nakajima, Jun wrote: > Hi Linus, > > Attached is a patch that enables PNI (Prescott New Instructions) > monitor/mwait in kernel idle (opcodes are now public). Basically MWAIT > is similar to hlt, but you can avoid IPI to wake up the processor > waiting. A write (by another processor) to the address range specified > by MONITOR would wake up the processor waiting on MWAIT.
Is mwait dependant on cached cpu memory and the cache exclusivity logic or directly on the processor. In other words can I use mwait in future to wait for DMA to hit a given location ? - Im mostly thinking about debugging uses
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