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SubjectRe: Algoritmic Complexity Attacks and 2.4.20 the dcache code
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   From: Willy Tarreau <willy@w.ods.org>
Date: Sat, 31 May 2003 10:56:12 +0200

Considering that the Alpha and the UltraSparc can issue up to 4
instruction per cycle,

Ultrasparc only has 2 integer units. So it really can only do 2
integer operations per cycle. GCC is giving it an optimal schedule
for -mtune=ultrasparc, I know because I wrote that instruction
scheduler :-)

You can get 4 issue if you're doing floating point stuff.

I believe the current generation Alpha has 3 integer units.
GCC should be doing a good job there too.
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