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SubjectRe: Request for Comment on PCI Express Configuration Support design
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On Llu, 2003-04-28 at 17:59, Seshadri, Harinarayanan wrote:
> which is essentially a Memory Mapped scheme to access this extended
> configuration region. Currently in Linux, the PCI Subsystem supports only
> type 1/ type 2 PCI configuration access, which is traditionally accessed
> through CF8/CFC mechanism.

(and BIOS, and IBM NUMA-Q/440)

> To support access to the extended configuration region of the PCI
> Express devices (Although legacy CF8/CFC scheme will still work, but the
> configuration access space will be limited to 256 bytes only), we need to
> modify the PCI subsystem. At the time of PCI initialization/device
> enumeration the pci_root_ops and hence pci_dev->ops structure is set to
> pci_express_ops for PCI Express devices (identified by the existence of the
> PCI Express capability structure).

Is this property dependant on the device or on the root bridge ? IE if I
have something like

PCIEXPRESS(root)---->PCIEXress/Cardbus bridge--->Ethernet card

Can I use the mmio interface to talk to the card - I'd assume so
(obviously it only has 256 bytes of data)

> static unsigned long __init pciexp_map_region(unsigned long
> phys)
> {
> unsigned long base, offset, mapped_area;
> base = ((unsigned long)phys) & PAGE_MASK;
> offset = ((unsigned long) phys) - base;
> mapped_area = (unsigned long) ioremap(base,
> PAGE_SIZE);
> return ( mapped_area? (mapped_area + offset): 0UL);
> }

ioremap is bright enough to do unaligned maps for you

> This will enable any existing pci driver to access the
> complete 4k config space (which include legacy 256 byte configuration region
> as well) using standard interface like pci_config_read/write call.

Looks pretty sound to me. The code was intended to support multiple
config mechanisms.

Alan

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