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SubjectRe: Tighten up serverworks workaround.
On Wed, 26 Feb 2003, Alan Cox wrote:

>> How can e help? Please give me a configuration and how the bug manifests
>> inself.
>OSB4 chipset system, some memory areas marked write combining with the
>processor memory type range registers. A long time ago Dell (I
>think) reported corruption from this and submitted changes to block the
>use of write combining on OSB4. The question has arisen as to whether
>thats a known thing, and if so which release of the chipset fixed it so that
>people can only apply such a restriction to problem cases not all OSB4.

I've got 2 OSB4 machines here, one a Tyan HEsl 2567 board. MTRRs
have been disabled on this board for a couple years now with
every kernel release, which I'm told is due to the MTRR problem
described in this thread.

00:00.1 PCI bridge: ServerWorks CNB20LE (rev 01)

Kimball, we chatted before about AGP on this board and a few
other issues, but I don't know if we discussed the MTRR issue.
Could you confirm this problem? If the problem is anything
workaroundable, it would be nice to have MTRRs working on this
box sometime as video is quite slow. I'm willing to test any
potential workarounds if something creeps up.


Mike A. Harris
OS Systems Engineer - XFree86 maintainer - Red Hat

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