Messages in this thread | | | Date | Tue, 25 Mar 2003 14:35:25 +0100 | From | Andi Kleen <> | Subject | Re: cacheline size detection code in 2.5.66 |
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> > Broken in i386 too. > > I don't see anything broken there. The K7 / K8 feature flags are not > bit for bit compatible though iirc (can't find my K8 cpuid manuals right now).
Umm - they should be. Otherwise CPUID would be completely useless.
I double checked both the Intel and the x86-64 manual now and bit 19 of 0000_0001 is CLFLUSH
So cpufeature.h and the x86-64 test is correct
0000_0001 is supposed to be globally compatible. 8000_0001 is supposed to be compatible inside AMD CPUs (and 19 is reserved here)
Ivan confused me. Either he read the application note wrong or it is wrong.
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