Messages in this thread | | | Date | Tue, 23 Dec 2003 13:57:40 +1100 | From | Nick Piggin <> | Subject | Re: [PATCH] 2.6.0 batch scheduling, HT aware |
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Con Kolivas wrote:
>On Tue, 23 Dec 2003 12:36, Nick Piggin wrote: > >>Con Kolivas wrote: >> >>>I discussed this with Ingo and that's the sort of thing we thought of. >>>Perhaps a relative crossover of 10 dynamic priorities and an absolute >>>crossover of 5 static priorities before things got queued together. This >>>is really only required for the UP HT case. >>> >>Well I guess it would still be nice for "SMP HT" as well. Hopefully the >>code can be generic enough that it would just carry over nicely. >> > >I disagree. I can't think of a real world scenario where 2+ physical cpus >would benefit from this. >
Well its the same problem. A nice -20 process can still lose 40-55% of its performance to a nice 19 process, a figure of 10% is probably too high and we'd really want it <= 5% like what happens with a single logical processor.
> >>It does >>have complications though because the load balancer would have to be taught >>about it, and those architectures that do hardware priorities probably >>don't even want it. >> > >Probably the simple relative/absolute will have to suffice. However it still >doesn't help the fact that running something cpu bound concurrently at nice 0 >with something interactive nice 0 is actually slower if you use a UP HT >processor in SMP mode instead of UP. >
It will be based on dynamic priorities, possibly with some feedback from nice as well, but it probably still won't be perfect and it will probably be very complex *cough* hardware priorities *cough* ;)
I might try to fit it into a more general priority balancing system because we currently have similar sorts of failings on regular SMP as well.
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