Messages in this thread | | | From | "Rusty Lynch" <> | Subject | Re: [Pcihpd-discuss] Re:[BUG] cpci patch for kernel 2.4.19 bug | Date | Wed, 8 Jan 2003 12:44:13 -0800 |
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From: "Scott Murray" <scottm@somanetworks.com> > On Wed, 8 Jan 2003, Rusty Lynch wrote: > > > From: "Yang, Harold" <harold.yang@intel.com> > > > > > > Hi, Scott & Greg: > > > > > > I have applied the cpci patch for kernel 2.4.19, and test it > > > thoroughly on ZT5084 platform. Two bugs are found: > > > > > > 1. In my ZT5084, the driver can't correctly detect the cPCI > > > Hot Swap bridge device. Two DEC21154 exist on ZT5084, > > > however, only one is the right bridge. The driver can't > > > distinguish them correctly. > > > > I just got a couple of ZT5541 peripheral master boards > > and can finally see what happens when an enumerable board > > is plugged into a ZT5084 chassis using a ZT5550 system master > > board. > > > > As of yet I have only tried a 2.5.54 kernel, but I see the > > same problems along with some other wacky behavior that I > > am trying to isolate. > > > > Now about the multiple DEC21154 devices ==> on my ZT5550 that > > is in system master mode, the first DEC21154 device is a bridge > > for the slots to the left of the system slots, and the second > > DEC21154 is a bridge for the right of the system slots. > > Okay, that's what I originally wanted to determine from the lspci > output I requested when Harold mentioned this problem at the end > of November. >
I am attaching output for: 1. lspci -vvv 2. cat /proc/ioports 3. cat /proc/iomem
For a ZT5550 running as system master in the second system slot of a ZT5084 chassis that has two ZT5541 (peripherial master) boards plugged in (one to the left of the sytem slots and the other to the right of the system slots.)
> > So if I boot the system master (I'll talk about problems with > > hotswaping in another email) with a peripheral board plugged > > into one of the slots on the right of the master using the > > current 2.5.54 kernel then I run into problems the first time > > cpci_hotplug_core.c::check_slots() runs because it only looks > > at the first bus when trying to find the card that caused the > > #ENUM. > > I assume by problems you mean that the cPCI event thread gets > shut down (which is what I'd expect), or do you mean something more > severe? >
The event thread shutsdown with the "cannot find ENUM# source, shutting down" error message. That's all.
> > The following patch will register each of the cpci busses instead > > of just the first one detected. > > Your patch is better than Harold's hack, but I'm probably going to > try and think of some other alternative, as the while loop idea > doesn't handle the possibility of someone having a 21154 bridge > on a PMC card or actually as a bridge on a cPCI card. The original > code doesn't really handle that possiblity either, so I'll need to > cook up something better anyway. > > > NOTE: I'm a little worried that the right way to do this is to > > properly initialize the RSS bits, or at least see how the > > chassis is configured via the RSS bits to determine which > > cpci bus to register. The ZT5084 doesn't have near as many > > configurations as newer designs like the ZT5088. > [snip] > > I will investigate reading the active bus(es) out of the HC, as I've > gotten the documentation for the HC from Performance Tech, I was just > too busy before Christmas to dig into it then. I'll try and have > something that attempts to handle your ZT5084 chassis done in a few > days. > > Scott 00:00.0 Host bridge: Intel Corp. 440BX/ZX/DX - 82443BX/ZX/DX Host bridge (rev 03) Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- Status: Cap+ 66Mhz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort+ >SERR- <PERR- Latency: 64 Region 0: Memory at f8000000 (32-bit, prefetchable) [size=64M] Capabilities: <available only to root>
00:01.0 PCI bridge: Intel Corp. 440BX/ZX/DX - 82443BX/ZX/DX AGP bridge (rev 03) (prog-if 00 [Normal decode]) Control: I/O+ Mem+ BusMaster+ SpecCycle+ MemWINV+ VGASnoop- ParErr- Stepping- SERR+ FastB2B- Status: Cap- 66Mhz+ UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 128 Bus: primary=00, secondary=01, subordinate=01, sec-latency=64 I/O behind bridge: 0000f000-00000fff Memory behind bridge: f5000000-f5ffffff Prefetchable memory behind bridge: fff00000-000fffff BridgeCtl: Parity- SERR- NoISA+ VGA+ MAbort- >Reset- FastB2B+
00:05.0 Ethernet controller: Digital Equipment Corporation DECchip 21142/43 (rev 41) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR+ FastB2B- Status: Cap- 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 165 (5000ns min, 10000ns max), cache line size 08 Interrupt: pin A routed to IRQ 11 Region 0: I/O ports at 1080 [size=128] Region 1: Memory at f4001000 (32-bit, non-prefetchable) [size=1K] Expansion ROM at <unassigned> [disabled] [size=256K]
00:06.0 Ethernet controller: Digital Equipment Corporation DECchip 21142/43 (rev 41) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR+ FastB2B- Status: Cap- 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 165 (5000ns min, 10000ns max), cache line size 08 Interrupt: pin A routed to IRQ 10 Region 0: I/O ports at 1400 [size=128] Region 1: Memory at f4001400 (32-bit, non-prefetchable) [size=1K] Expansion ROM at <unassigned> [disabled] [size=256K]
00:07.0 ISA bridge: Intel Corp. 82371AB/EB/MB PIIX4 ISA (rev 02) Control: I/O+ Mem+ BusMaster+ SpecCycle+ MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap- 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 0
00:07.1 IDE interface: Intel Corp. 82371AB/EB/MB PIIX4 IDE (rev 01) (prog-if 80 [Master]) Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap- 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 64 Region 4: I/O ports at 14a0 [size=16]
00:07.2 USB Controller: Intel Corp. 82371AB/EB/MB PIIX4 USB (rev 01) (prog-if 00 [UHCI]) Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap- 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 64 Interrupt: pin D routed to IRQ 9 Region 4: I/O ports at 1060 [size=32]
00:07.3 Bridge: Intel Corp. 82371AB/EB/MB PIIX4 ACPI (rev 02) Control: I/O+ Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap- 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Interrupt: pin ? routed to IRQ 9
00:08.0 PCI bridge: Digital Equipment Corporation DECchip 21154 (rev 05) (prog-if 00 [Normal decode]) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- Status: Cap+ 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 64, cache line size 08 Bus: primary=00, secondary=02, subordinate=02, sec-latency=68 I/O behind bridge: 00002000-00002fff Memory behind bridge: f6000000-f61fffff Prefetchable memory behind bridge: 00000000fff00000-0000000000000000 BridgeCtl: Parity- SERR- NoISA+ VGA- MAbort- >Reset- FastB2B- Capabilities: <available only to root>
00:0b.0 Class ff00: Ziatech Corporation: Unknown device 5550 (rev 03) Subsystem: Ziatech Corporation: Unknown device 5550 Control: I/O+ Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- Status: Cap- 66Mhz- UDF- FastB2B- ParErr- DEVSEL=slow >TAbort- <TAbort- <MAbort- >SERR- <PERR- Interrupt: pin A routed to IRQ 9 Region 0: I/O ports at 1480 [size=32] Region 1: Memory at f4000000 (32-bit, non-prefetchable) [size=4K]
00:0c.0 PCI bridge: Digital Equipment Corporation DECchip 21154 (rev 05) (prog-if 00 [Normal decode]) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- Status: Cap+ 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 64, cache line size 08 Bus: primary=00, secondary=03, subordinate=03, sec-latency=68 I/O behind bridge: 00003000-00003fff Memory behind bridge: f6200000-f63fffff Prefetchable memory behind bridge: 00000000fff00000-0000000000000000 BridgeCtl: Parity- SERR- NoISA+ VGA- MAbort- >Reset- FastB2B- Capabilities: <available only to root>
01:00.0 VGA compatible controller: Chips and Technologies F69000 HiQVideo (rev 64) (prog-if 00 [VGA]) Subsystem: Chips and Technologies F69000 HiQVideo Control: I/O+ Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping+ SERR+ FastB2B- Status: Cap- 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Interrupt: pin A routed to IRQ 11 Region 0: Memory at f5000000 (32-bit, non-prefetchable) [size=16M] Expansion ROM at <unassigned> [disabled] [size=256K]
02:0d.0 Bridge: Digital Equipment Corporation DECchip 21554 (rev 01) Subsystem: Ziatech Corporation: Unknown device 5541 Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR+ FastB2B+ Status: Cap+ 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 64, cache line size 08 Interrupt: pin A routed to IRQ 11 Region 0: Memory at f6101000 (32-bit, non-prefetchable) [size=4K] Region 1: I/O ports at 2400 [size=256] Region 2: I/O ports at 2000 [size=256] Region 3: Memory at f6000000 (32-bit, non-prefetchable) [size=1M] Region 4: Memory at f6100000 (32-bit, non-prefetchable) [size=4K] Capabilities: <available only to root>
03:0a.0 Bridge: Digital Equipment Corporation DECchip 21554 (rev 01) Subsystem: Ziatech Corporation: Unknown device 5541 Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR+ FastB2B+ Status: Cap+ 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 64, cache line size 08 Interrupt: pin A routed to IRQ 10 Region 0: Memory at f6301000 (32-bit, non-prefetchable) [size=4K] Region 1: I/O ports at 3400 [size=256] Region 2: I/O ports at 3000 [size=256] Region 3: Memory at f6200000 (32-bit, non-prefetchable) [size=1M] Region 4: Memory at f6300000 (32-bit, non-prefetchable) [size=4K] Capabilities: <available only to root>
00000000-0009f7ff : System RAM 0009f800-0009ffff : reserved 000a0000-000bffff : Video RAM area 000c0000-000c7fff : Video ROM 000c9800-000c9fff : Extension ROM 000ca000-000ca7ff : Extension ROM 000f0000-000fffff : System ROM 00100000-0fffffff : System RAM 00100000-002fda29 : Kernel code 002fda2a-003c7d67 : Kernel data f4000000-f4000fff : PCI device 1138:5550 (Ziatech Corporation) f4000000-f4000fff : cpcihp_zt5550 f4001000-f40013ff : Digital Equipment Co DECchip 21142/43 f4001000-f40013ff : tulip f4001400-f40017ff : Digital Equipment Co DECchip 21142/43 (#2) f4001400-f40017ff : tulip f5000000-f5ffffff : PCI Bus #01 f5000000-f5ffffff : Chips and Technologi F69000 HiQVideo f6000000-f61fffff : PCI Bus #02 f6000000-f60fffff : Digital Equipment Co DECchip 21554 f6100000-f6100fff : Digital Equipment Co DECchip 21554 f6101000-f6101fff : Digital Equipment Co DECchip 21554 f6200000-f63fffff : PCI Bus #03 f6200000-f62fffff : Digital Equipment Co DECchip 21554 (#2) f6300000-f6300fff : Digital Equipment Co DECchip 21554 (#2) f6301000-f6301fff : Digital Equipment Co DECchip 21554 (#2) f8000000-fbffffff : Intel Corp. 440BX/ZX/DX - 82443B fffc0000-ffffffff : reserved 0000-001f : dma1 0020-003f : pic1 0040-005f : timer 0060-006f : keyboard 0070-007f : rtc 0080-008f : dma page reg 00a0-00bf : pic2 00c0-00df : dma2 00e1-00e1 : #ENUM hotswap signal register 00f0-00ff : fpu 0170-0177 : ide1 01f0-01f7 : ide0 02f8-02ff : serial 0376-0376 : ide1 03c0-03df : vga+ 03f6-03f6 : ide0 03f8-03ff : serial 0cf8-0cff : PCI conf1 1000-103f : Intel Corp. 82371AB/EB/MB PIIX4 1040-105f : Intel Corp. 82371AB/EB/MB PIIX4 1060-107f : Intel Corp. 82371AB/EB/MB PIIX4 1080-10ff : Digital Equipment Co DECchip 21142/43 1080-10ff : tulip 1400-147f : Digital Equipment Co DECchip 21142/43 (#2) 1400-147f : tulip 1480-149f : PCI device 1138:5550 (Ziatech Corporation) 14a0-14af : Intel Corp. 82371AB/EB/MB PIIX4 2000-2fff : PCI Bus #02 2000-20ff : Digital Equipment Co DECchip 21554 2400-24ff : Digital Equipment Co DECchip 21554 3000-3fff : PCI Bus #03 3000-30ff : Digital Equipment Co DECchip 21554 (#2) 3400-34ff : Digital Equipment Co DECchip 21554 (#2)
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