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SubjectRe: no more MTRRs available ?
On Wed, 29 Jan 2003 16:20:13 +0000
Dave Jones <davej@codemonkey.org.uk> wrote:

> On Wed, Jan 29, 2003 at 05:05:54PM +0100, Stephan von Krawczynski wrote:
>
> > Mark Hahn <hahn@physics.mcmaster.ca> wrote:
>
> (odd, I'm not getting Mark's mails to l-k).

He does not send them there. I know it is a no-no to forward his writings to
the list, but I thought it may be of use to others, too (and he did not shoot
me for it so far ;-)

> > > that your bios is stupid, I think. mtrr's handle areas that are
> > > powers of two in size (and >= 1M, I think). the problem here is that
> > > the bios is trying to represent 4G of write-back ram and a 16M of
> > > uncachable IO area (AGP aperture, I'm guessing). the correct way
> > > to do this is a single 4G mtrr with an overlapping 16M one.
>
> That does seem to make more sense. Perhaps too much sense.
> ISTR there were ordering rules in how you layer MTRRs on top of each
> other.

Ok, after reading your thoughts and re-reading the bios stuff I found and "DRAM
alignment" option, and voila:

reg00: base=0x00000000 ( 0MB), size=2048MB: write-back, count=1
reg01: base=0x100000000 (4096MB), size=4096MB: write-back, count=1
reg02: base=0x200000000 (8192MB), size=8192MB: write-back, count=1
reg03: base=0x400000000 (16384MB), size=16384MB: write-back, count=1
reg04: base=0x800000000 (32768MB), size=32768MB: write-back, count=1
reg05: base=0xfb000000 (4016MB), size= 8MB: write-combining, count=1

The table got obviously shorter and significantly "better". It seems the
onboard VGA stuff is now mapped out of the normal DRAM range.

I must admit though that some of this bios looks fishy, because now I cannot
find the original DRAM caching entries any longer, no matter what I switch on
or off (you know those "write-back, write-through" stuff).

Now I think one can really be content with this setup. Thanks a lot to Mark and
Dave.
In case anyone is interested, this is an Asus TRL-DLS mb.

--
Regards,
Stephan
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