Messages in this thread |  | | Date | Sat, 18 Jan 2003 19:08:40 -0800 | From | William Lee Irwin III <> | Subject | Re: 48GB NUMA-Q boots, with major IO-APIC hassles |
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On Sat, Jan 18, 2003 at 09:32:22PM -0500, Zwane Mwaikambo wrote: >> You'll drop irqs when you have collisions with devices >> attached to other busses/ioapics
On Sat, Jan 18, 2003 at 06:55:14PM -0800, William Lee Irwin III wrote: > Those aren't reachable anyway. Any given IO-APIC can only reach > devices within its own node. The only possible issue is the priority > class bounded-depth queueing issue (max of 2 or 3 pending) which I've > decided to ignore until something closer to working materializes.
Clarification: each node has its own APIC bus, and only logical DESTMOD RTE's can interrupt cpus on remote nodes. The invariant of "any given IO-APIC can only interrupt cpus on the same node" comes from the fact that the RTE destinations s are programmed for physical broadcast, which by definition cannot reach any further than the local node / APIC bus.
Essentially, because only interrupts with logical destinations are routed by the cluster controllers, the guarantee of local-only interruption is provided by using physical destinations in RTE's.
The net result is that so long as there are no vector clashes within a given node, the software interrupt number is uniquely determined by the vector and the node the interrupt was received on. And it is always possible to assign unique vectors within a node as there are 190 vectors and only 48 IO-APIC RTE's/pins.
All good? No more IDT overwriting and/or cross-node interrupt number sharing concerns?
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