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SubjectRe: [Pcihpd-discuss] Re: [BUG][2.5]deadlock on cpci hot insert
On 16 Jan 2003, Rusty Lynch wrote:

> On Wed, 2003-01-15 at 23:04, Rusty Lynch wrote:
> > On Wed, 2003-01-15 at 21:33, Scott Murray wrote:
> > > PS: Any word on whether my ZT5550 driver patch from last Friday fixes
> > > your ZT5084 chassis issues?
> >
> > Oh yea, that's the other thing I was going to do. I just built and
> > installed the patched kernel with no problems, but I will be able to say
> > more after I have physical access to my lab tomorrow.
> >
> > --rustyl
> The cpcihp_zt5550 patch you sent last Friday does not work on my
> ZT5084 chassis because it does not detect any active cpci busses,
> and therefore doesn't register any cpci busses, and eventually
> gives up when cpci_hp_start fails (since slots == 0).


> >From my dmesg, I can see:
> cpcihp_zt5550: HCF_HCS = 0x0000003b
> I added a couple of debug messages before calling cpci_hp_start.
> dbg("Bus #1 is %s", hcf_hcs & HCS_BUS1_ACTIVE ? "active":"not active");
> dbg("Bus #2 is %s", hcf_hcs & HCS_BUS2_ACTIVE ? "active":"not active");
> which end up in dmesg as:
> cpcihp_zt5550: Bus #1 is not active
> cpcihp_zt5550: Bus #2 is not active

Hmm, that's definitely not what I expected. For reference, my test ZT5550
here yields HCF_HCS = 0x31a in a standard (non-RSS) cPCI chassis, which
means both buses are active in my setup, and I'd expected the same from an
Active-Active or Locked Active-Active setup in a ZT5084 chassis. I'll dig
deeper in the host controller docs tomorrow as well as try and glean
something from the rough 2.2 RSS code Intel/Ziatech released in late 2001.
In the meantime, could you describe for me what you've got the "High
Availability" options in your ZT5550's BIOS set to? Also, just so I'm
clear on what your setup consists of, am I correct in my assumption that
you only have a single ZT5550 in your ZT5084 chassis?



Scott Murray
SOMA Networks, Inc.
Toronto, Ontario

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