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SubjectRe: [PATCH] improved boot time TSC synchronization
Jim Houston wrote:
> + * t0 ---\
> + * ---\
> + * --->
> + * tm
> + * /---
> + * /---
> + * t1 <---
> + *
> + *
> + * The goal is to adjust the slave's TSC such that tm falls exactly half-way
> + * between t0 and t1.

It looks like not only can you synchronise with a certain accuracy,
you can determine an upper bound on that accuracy (assuming the
underlying CPU clocks are locked).

Maybe that figure could be put into /proc/cpuinfo?

As well as being an interesting value, it may be useful for programs
to know the effective accuracy of `rdtsc'.

-- Jamie
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