Messages in this thread | | | Date | Mon, 9 Sep 2002 11:53:40 -0700 (PDT) | From | Linus Torvalds <> | Subject | Re: [PATCH][RFC] per isr in_progress markers |
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On Mon, 9 Sep 2002, Ingo Molnar wrote: > > There's also the following effect that could generate additional > interrupts: the *same* IRQ source that is currently executing might > generate a (spurious but otherwise harmless) interrupt if we first ACK the > card then ACK the APIC and then do processing. Our current way of masking > interrupts in the IO-APIC at least leaves them pending there until the > handler's main work loop is finished and mitigates irqs.
I agree with you, but that is only true for edge-triggered APIC interrupts, though - for level-triggered ones we will just re-take the interrupt when we unmask it again.
Which is kind of sad. Is there some fast way to read the status of a level-trigger irq off the IO-APIC in case it is still pending, and to do the mitigation even for level-triggered?
(Btw, if there is, that would also allow us to notice the "constantly screaming PCI interrupt" without help from the low-level isrs)
Linus
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