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SubjectRe: [patch 2.5.31] transparent PCI-to-PCI bridges
>Obviously, this window + 128M range of the PCI card won't fit in the
>256M region of the host bridge. So, the only way to get all this working
>is to set AGP bridge window such that it overlaps both regions
>of the host bridge. Like this:
>0x80000000-0x87ffffff - PCI card, fb
>0x88000000-0xf00fffff - AGP bridge, memory window
> 0x88000000-0x8fffffff - AGP card, fb
> 0x90000000-0xefffffff - empty
> 0xf0000000-0xf0000fff - AGP card, MMIO
>0xf0100000-0xf0100fff - PCI card, MMIO
>I don't see how you can cope with it using 2 separate bus resources -
>the memory resource of the AGP bridge wouldn't have a valid parent.
>OTOH, if you expose a _single_ memory resource of the host bridge
>(0x80000000-0xf0ffffff) and write your pcibios_align_resource()
>such that it won't allow allocation of non-bridge resources in the
>0x90000000-0xefffffff range, everything is fine.
>Please prove me that I'm wrong. :-)

First, a simple problem: You are showing a possible problem caused
by a given PCI host & bridge setup. That's not my point. My point
is that I _do_ have setups with N MMIO regions and want the kernel
to be able to deal with that. I'm not introducing any limitation to
the code, I want the code to be generic enough to cope with a setup
that exist (as the host is configured by my firmware).

Also, in your example, if I expose a single memory resource, then I
lie since the host bridge in this example would not forward addresses
"between" the 2 ranges, thus the kernel would potentially allocate
space for unassigned devices in that non-decoded range.

I want my host pci_bus structure to expose what it is really forwarding.
That's as simple as that. If your host is configured in a more "sane",
way, then good. I'm not forcing anybody to have 2 MMIO regions ;)
I just want that dawn code to deal with cases where I do have them
(or more). Again, that code isn't about setting up the bus, it's
about coping with an existing setup when building the resource tree.

Regarding your above example, it just don't happen in real life.
First, we have AGP as a separate PCI host domain on pmac ;) Then,
the firmware can configures host bridges with large enough regions
to deal with what is needed by the card.


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