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    SubjectRe: interrupt latency
    At 7:41 am -0600 8/28/02, wrote:
    >Average and worst case are different.

    I can believe that. The explanation that jumps to mind is PCI bus
    contention because of DMA, causing the inb to stall or to get
    repeatedly retried. 13us seems a little extreme, but not completely
    /Jonathan Lundell.
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