Messages in this thread |  | | Date | Tue, 27 Aug 2002 14:31:17 -0700 (PDT) | Subject | Re: readsw/writesw readsl/writesl | From | "David S. Miller" <> |
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From: Alan Cox <alan@lxorguk.ukuu.org.uk> Date: 27 Aug 2002 18:25:24 +0100
On Tue, 2002-08-27 at 08:30, David S. Miller wrote: > It used to be an optimization when cpus were really slow. readsl becomes relevant once people start shipping bridges that can do asynchronous pci mmio read or burst mode to order however This would be relevant if the MMIO address were to increment, but bursting from the same MMIO word? That's what readsl is meant to do, just as insl does for port I/O addresses.
UltraSPARC can do what you mention using 64-byte block loads and stores, the same ones we use for fast memcpy/memset. It just looks like a huge 64-byte MMIO on the pci bus. - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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