lkml.org 
[lkml]   [2002]   [Aug]   [19]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
Date
From
SubjectA question about cache coherence
Met a problem in my research. I run some code on a
Xeon
dual-processor machine. It seems to me that there is a
cache coherence problem. As I am not so familiar
to this topic, I would like to ask some experts about
the following questions.

1. Do Xeon processors have hardware mechanisms to
maintain cache coherence?
2. Does the SMP kernel handle the cache coherence
problem
3. What should I do if both of them don't handle cache
coherence.

Thanks.

Frank Samuel

__________________________________________________
Do You Yahoo!?
HotJobs - Search Thousands of New Jobs
http://www.hotjobs.com
-
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/

\
 
 \ /
  Last update: 2005-03-22 13:28    [W:0.050 / U:0.896 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site