Messages in this thread | | | Date | Wed, 19 Jun 2002 15:58:44 +0200 (MET DST) | From | "Maciej W. Rozycki" <> | Subject | Re: [Patch] tsc-disable_A5 |
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On Sat, 15 Jun 2002, Mikael Pettersson wrote:
> I disagree with Alan's recommendation.
So do I.
> The real problem is that the kernel confuses a CPU-level property > (do the CPUs have TSCs?) with a system-level property (are the > TSCs present and in sync?). CONFIG_X86_TSC really describes the > latter property, for the former we have the cpu_has_tsc() macro.
Well, CONFIG_X86_TSC simply asserts we have TSCs present and in sync and cpu_has_tsc is a run-time check for the same. The X86_FEATURE_TSC bit shouldn't be set (and e.g. "notsc" takes care of this) unless TSCs work correctly as it's both used internally and exported to the userland. For low-level fiddling with TSCs one can use cpuid either directly or with the cpuid driver.
-- + Maciej W. Rozycki, Technical University of Gdansk, Poland + +--------------------------------------------------------------+ + e-mail: macro@ds2.pg.gda.pl, PGP key available +
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