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Linus Torvalds writes:

> > Unknown bridge resource 0: assuming transparent
> > Unknown bridge resource 1: assuming transparent
> > Unknown bridge resource 2: assuming transparent
>
> This is the problem.

BTW, this "assuming transparent" bit continually causes us problems on
RS/6000 machines that have a PCI-PCI bus. If none of the cards behind
the bridge have any I/O resources, the firmware will set up the bridge
with the I/O window closed, by setting the base register to one more
than the limit register, which is correct according to the Intel
document describing PCI-PCI bridges.

Then the bridge probing code comes along and says "assuming
transparent", which is wrong. The aperture is closed and the bridge
should have no I/O space resource.

I would really like the relevant code in pci_read_bridge_bases to look
like this:

if ((base || limit) && base <= limit) {
res->flags = (io_base_lo & PCI_IO_RANGE_TYPE_MASK) | IORESOURCE_IO;
res->start = base;
res->end = limit + 0xfff;
res->name = child->name;
} else if (base == limit + 0x1000) {
/* Firmware/BIOS has deactivated this window */
res->start = res->end = 0;
res->flags = 0;
printk(KERN_ERR "Bridge %s resource %d was deactivated by"
" firmware\n", dev->slot_name, 0);
} else {
/*
* Ugh. We don't know enough about this bridge. Just assume
* that it's entirely transparent.
*/
printk(KERN_ERR "Unknown bridge resource %d: assuming transparent\n", 0);
child->resource[0] = child->parent->resource[0];
}

The (base || limit) part instead of just testing base is needed
because we sometimes get PCI-PCI bridges that are legitimately set up
with the bridge having an aperture starting at I/O address 0.

IIRC someone told me that we had to do the "assuming transparent" bit
because of buggy PCI-PCI bridges used on some PCs. Can anyone
enlighten me on the details of that?

Paul.
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