Messages in this thread | | | From | Oliver Neukum <> | Subject | Re: PCI DMA to small buffers on cache-incoherent arch | Date | Tue, 11 Jun 2002 17:44:55 +0200 |
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Am Dienstag, 11. Juni 2002 17:12 schrieb David Brownell: > > One question is whether to support only one of them, or allow both. > > In either case the DMA-mapping.txt will need to touch on the issue. > > > > Another important issue is from where do these issues originate? > > > > This stuff rarely happens most of the time because block buffers and > > networking buffers are what are fed to the chip. > > I think the examples Oliver found related mostly to device control > and status tracking.
I did not look for others. It would seem that SCSI and networking are affected as well. SCSI due to the sense buffer.
> Or then there's David Woodhouse's option (disable caching on those > pages while the DMA mapping is active) which seems good, except for > the fact that this issue is most common for buffers that are a lot > smaller than one page ... so lots of otherwise cacheable data would > suddenly get very slow. :)
There might be several buffers in one page. You'd have to count DMA users in struct page. Secondly are you sure that a physical page won't be accessed by several different virtual addresses ? On some architectures that would kill us.
Regards Oliver
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