Messages in this thread | | | Date | Mon, 10 Jun 2002 10:03:09 -0700 | From | Tom Rini <> | Subject | Re: PCI DMA to small buffers on cache-incoherent arch |
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On Mon, Jun 10, 2002 at 08:59:48AM -0700, Roland Dreier wrote: > >>>>> "David" == David S Miller <davem@redhat.com> writes: > > Paul> This is the problem scenario. Suppose we are doing DMA to a > Paul> buffer B and also independently accessing a variable X which > Paul> is not part of B. Suppose that X and the beginning of B are > Paul> both in cache line C. > > David> I see what the problem is. Hmmm... > > David> I'm trying to specify this such that knowledge of > David> cachelines and whatnot don't escape the arch specific code, > David> ho hum... Looks like that isn't possible. > > So is the consensus now that in general drivers should make sure any > buffers passed to pci_map/unmap are aligned to SMP_CACHE_BYTES (and a > multiple of SMP_CACHE_BYTES in size)? In other words if a driver uses > an unaligned buffer it should be fixed unless we can prove (and > document in a comment :) that it won't cause problems on an arch > without cache coherency and with a writeback cache.
And how about we don't call it SMP_CACHE_BYTES too? The processors where this matters certainly aren't doing SMP...
-- Tom Rini (TR1265) http://gate.crashing.org/~trini/ - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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