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SubjectRe: PCI DMA to small buffers on cache-incoherent arch
>>>>> "Tom" == Tom Rini <> writes:

Tom> SMP_CACHE_BYTES is non-sensical on 4xx (and 8xx) since they
Tom> don't do SMP..

True but <asm/cache.h> defines it anyway... of course it would be no
problem to use L1_CACHE_BYTES and in fact that probably makes sense
because we're talking about PPC-only macros (other arches would have
their own definition).


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