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SubjectRe: PROBLEM: Timer interrupt lockup on HT machine

I have looked into this some more.

It appears that the mask register of the 8259 PIC is corrupted.
On this machine, the timer is setup through setup_ExtINT_IRQ0_pin()
(8259A master -> IRQ broadcast), all is working well.

The correct value of the mask register (IO port 0x21) should be 0xfa
(Timer & cascade enabled).

When the timer lockup happens, the register value is 0x07, i.e.
completely wrong, and IRQ 0 is masked. I can use a user space
program to re-eneable the timer interrupt, and all is fine again.

I am pretty irritated by this behaviour, because in the timer
operating mode on this system the mask register is never accessed
after the initial setup.

It is very obvious that this situation arises around the time of X
server startup.

Any clues?


Martin Wilck Phone: +49 5251 8 15113
Fujitsu Siemens Computers Fax: +49 5251 8 20409
Heinz-Nixdorf-Ring 1
D-33106 Paderborn

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