Messages in this thread | | | Subject | Re: 2.4.19/20, 2.5 missing P4 ifdef ? | From | GrandMasterLee <> | Date | 28 Nov 2002 22:51:05 -0600 |
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On Thu, 2002-11-28 at 11:12, Bill Davidsen wrote: > On Thu, 28 Nov 2002, Dave Jones wrote: > > > On Thu, Nov 28, 2002 at 03:17:53PM +0100, Margit Schubert-While wrote: > > > Just noticed this in "include/asm-i386/processor.h" : > > > > > > --- snip --- > > > /* Prefetch instructions for Pentium III and AMD Athlon */ > > > #ifdef CONFIG_MPENTIUMIII > > > #define ARCH_HAS_PREFETCH > > > extern inline void prefetch(const void *x) > > > { > > > __asm__ __volatile__ ("prefetchnta (%0)" : : "r"(x)); > > > } > > > #elif CONFIG_X86_USE_3DNOW > > > --- end snip --- > > > > > > The P4 has SSE and prefetch or no ? > > > > It does. You seem to have found a bug. > > A bug? An inefficiency, obviously, but it should be functionally correct, > no? Or is there a problem I've missed other than performance?
IMHO, when building systems, any deficiency I find, is logged as a bug. I'd imagine, anything perceived as a problem, should be treated this way. Imho, performance, or lack of, is a bug, if a potential fix is available.
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