Messages in this thread | | | Date | Fri, 25 Jan 2002 18:51:24 +0000 (GMT) | From | arjan@fenrus ... | Subject | Re: [PATCH]: Fix MTRR handling on HT CPUs (improved) |
| |
In article <E16UBUl-0003J9-00@the-village.bc.nu> you wrote: > As Dave pointed out I was mixing them
>> just not do it on the right CPU (you're _not_ supposed to read to see if >> you are writing the same value: MTRR's can at least in theory have >> side-effects, so it's not the same check as for the microcode update).
> So why not just set it twice - surely that is harmless ? Why add complex > code ?
mtrr code does
"read value" -> store in variable "set uncached" <do lots of fiddling> "write stored value"
on all cpus precisely in parallel.
Now... on HT the second half will store the value the first half just set to uncached. and worse: it will RESTORE that into the final mtrr..
- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
| |