[lkml]   [2001]   [Sep]   [27]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
Messages in this thread
SubjectRe: Pentium SSE prefetcht0 instruction... How do you make it work
On Thu, 2001-09-27 at 14:43, Tony Hagale wrote:
> Intel's p3/4 prefetch instructions are hints only. They are only executed
> asynchronously, and depend heavily on the other load on the processor at
> the time. They are not required to prefetch, *and* they are not required
> to be executed when you think they should in the flow of the program. You
> can serialize them by using an MFENCE instruction, but they still aren't
> guaranteed to run.
> Check the p4 manuals. In fact, I'm not sure prefetch was implemented in
> p3. I could be wrong, check the manual.

prefetch is in P3 and P4.

there are prefetcht0, prefetcht1, prefetcht2, and prefetchnta
instructions, Intel's programming docs have references on these all

Robert M. Love
rml at
rml at

To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to
More majordomo info at
Please read the FAQ at

 \ /
  Last update: 2005-03-22 13:03    [W:0.028 / U:0.260 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site