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Subject[prelim-PATCH] Enable SSE on K7 without BIOS support.

This following patch enables SSE on K7 systems that:

a) support SSE (are Palomino or Morgan cores)
b) Have broken BIOS's that don't enable SSE for you.

Appearently, SSE support is not enabled by default on Athlon4/MP's and
model 7 Durons, and the BIOS is supposted to enable the feature. My
laptop's BIOS doesn't do this, so it became a moral crusade to figure out
why I couldn't use SSE. On a hint from an AMD support person who told me
register 15 needs to be 0 to enable SSE, and an obscure web reference to
a "Athlon HWCR MSR15", we've discovered that writing '0' to the MSR
0xc0010015 enables SSE.

While this appears to work for me, I'd like for people to test this on
machines that -do- currently support SSE on the k7 and make sure it
doesn't break anything.

Also weird, is that before writing a '0' to this MSR, the MSR reads
0x00000000-0x04009000. After writing a 0, it reads 0x00000000-0x04000000,
and SSE seems to work fine. What those other flags do, and why it remains
set even after writing a 0, I have no idea without proper documentation.
I'd like to know what other people's MSR15 values are on K7's.

Vince Weaver ( co-authored this patch.

feedback appreciated...

John Clemens ICQ: 7175925, IM: PianoManO8
"I Hate Quotes" -- Samuel L. Clemens

diff -u --recursive linux-orig/arch/i386/kernel/setup.c linux/arch/i386/kernel/setup.c
--- linux-orig/arch/i386/kernel/setup.c Wed Sep 19 22:49:11 2001
+++ linux/arch/i386/kernel/setup.c Wed Sep 19 22:51:34 2001
@@ -1272,6 +1272,14 @@

case 6: /* An Athlon/Duron. We can trust the BIOS probably */
+ if (c->x86_model == 6 || c->x86_model == 7) {
+ rdmsr(MSR_K7_HWCR, l, h);
+ if ( (h|l) != 0 ) {
+ printk(KERN_INFO "Palomino/Morgan: Enabling K7/SSE support (your BIOS didn't..)\n");
+ wrmsr(MSR_K7_HWCR, 0, 0);
+ set_bit(X86_FEATURE_XMM, &c->x86_capability);
+ }
+ }

diff -u --recursive linux-orig/include/asm-i386/msr.h linux/include/asm-i386/msr.h
--- linux-orig/include/asm-i386/msr.h Wed Sep 19 22:49:27 2001
+++ linux/include/asm-i386/msr.h Wed Sep 19 22:57:32 2001
@@ -81,6 +81,7 @@

#define MSR_K7_EVNTSEL0 0xC0010000
#define MSR_K7_PERFCTR0 0xC0010004
+#define MSR_K7_HWCR 0xC0010015

/* Centaur-Hauls/IDT defined MSRs. */
#define MSR_IDT_FCR1 0x107
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