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SubjectRe: [patch] zero-bounce highmem I/O
   From: Gerd Knorr <>
Date: 16 Aug 2001 12:14:40 GMT

While we are at it: Is there some portable way to figure whenever I can
do a PCI DMA transfer to some page? On ia32 I can simply look at the
physical address and if it is behind 4G it doesn't work for 32bit PCI
devices. But I think that is not true for architectures which have a
iommu ...

Currently this is lacking. The state of affairs for platforms
I know something about is:

x86: "4GB test"
alpha/sparc64/ppc64: any physical memory whatsoever may be accessed
via 32-bit PCI addressing due to IOMMU
ia64: "software IOMMU" scheme causes DMA to >4GB addresses to
require bounce buffers when using 32-bit addressing
Port posses broken 64-bit PCI addressing hack in an attempt
to deal with limitations of software IOMMU scheme.

To be honest, you really shouldn't care about this. If you are
writing a block device, the block/scsi/ide/whatever layer should take
care to only give you memory that can be DMA'd to/from.

Same goes for the networking layer.

In some cases, the distinction being made is "highmem vs not-highmem"
for something being DMA'able on PCI. This is on thing the networking
references. But, while this will always lead to correct behavior, it
is very inefficient.

Jens's and my work aims to directly address these kinds of issues.
Whatever we finally end up in Jens's code as the "DMA'able test" will
likely propagate into the networking bits.

David S. Miller
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