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Chris Wedgwood wrote:
>
> On Tue, Jul 10, 2001 at 02:28:54PM -0400, Brian Gerst wrote:
>
> Jesse Pollard wrote:
>
> > If the entire page table were given to a user, then a full cache
> > flush would have to be done on every context switch and system
> > call. That would be very slow, but would allow a full 4G address
> > for the user.
>
> A full cache flush would be needed at every entry into the kernel,
> including hardware interrupts. Very poor for performance.
>
> Why would a cache flush be necessary at all? I assume ia32 caches
> where physically not virtually mapped?

I meant TLB flush, sorry.

--

Brian Gerst
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