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SubjectRe: VIA 686B/Data Corruption
"Ryan W. Maple" wrote:
>
> I remember hearing something about Red Hat disabling UDMA on VIA chips
> across the board. Maybe that has something to do with it?

Dunno, if the kernel lies. There are four HDs on Promise and one HD and one
CDROM on VIA. This is from currently running 2.4.2-2:

----------VIA BusMastering IDE Configuration----------------
Driver Version: 3.20
South Bridge: VIA vt82c686b
Revision: ISA 0x40 IDE 0x6
BM-DMA base: 0xb800
PCI clock: 33MHz
Master Read Cycle IRDY: 0ws
Master Write Cycle IRDY: 0ws
BM IDE Status Register Read Retry: yes
Max DRDY Pulse Width: No limit
-----------------------Primary IDE-------Secondary IDE------
Read DMA FIFO flush: yes yes
End Sector FIFO flush: no no
Prefetch Buffer: no no
Post Write Buffer: no no
Enabled: yes yes
Simplex only: no no
Cable Type: 40w 40w
-------------------drive0----drive1----drive2----drive3-----
Transfer Mode: UDMA PIO PIO PIO

Address Setup: 30ns 30ns 120ns 120ns
Cmd Active: 90ns 90ns 480ns 480ns
Cmd Recovery: 30ns 30ns 480ns 480ns
Data Active: 90ns 90ns 330ns 330ns
Data Recovery: 30ns 30ns 270ns 270ns
Cycle Time: 60ns 90ns 90ns 90ns
Transfer Rate: 33.3MB/s 22.2MB/s 22.2MB/s 22.2MB/s


PDC20265 Chipset.
------------------------------- General Status ----------------------------
Burst Mode : enabled
Host Mode : Normal
Bus Clocking : 33 PCI Internal
IO pad select : 10 mA
Status Polling Period : 0
Interrupt Check Status Polling Delay : 2
--------------- Primary Channel ---------------- Secondary Channel --------
enabled enabled
66 Clocking enabled enabled
Mode PCI Mode PCI
FIFO Empty FIFO Empty
--------------- drive0 --------- drive1 -------- drive0 ---------- drive1 -
DMA enabled: yes yes yes yes
DMA Mode: UDMA 4 UDMA 4 UDMA 4 UDMA 4
PIO Mode: PIO 4 PIO 4 PIO 4 PIO 4


- Jussi Laako


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