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SubjectRe: Going beyond 256 PCI buses
Tom Gall wrote:
> The box that I'm wrestling with, has a setup where each PHB has an
> additional id, then each PHB can have up to 256 buses. So when you are
> talking to a device, the scheme is phbid, bus, dev etc etc. Pretty easy
> really.
> I am getting for putting something like this into the kernel at large,
> it would probably be best to have a CONFIG_GREATER_THAN_256_BUSES or
> some such.

We don't need such a CONFIG_xxx at all. The current PCI core code
should scale up just fine.

According to the PCI spec it is -impossible- to have more than 256 buses
on a single "hose", so you simply have to implement multiple hoses, just
like Alpha (and Sparc64?) already do. That's how the hardware is forced
to implement it...


Jeff Garzik | Andre the Giant has a posse.
Building 1024 |
MandrakeSoft |
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