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> My wild guess is that with the "faster" code, the K7 is avoiding loading
> cache lines just to write them out again, and is just writing tons of data.
> The PPC G4 - and perhaps even the G3 - performs a similar trick
> automatically, without special assembly...

X86 has done that since the K5 era.

No the main thing that the mmx copier does is to read and write in 64bit
wide chunks, and then more importantly to prefetch pending data. Thus instead
of stalling on reads there is a continual stream of data from the sdram hitting
the cpu ready for us to write it back out (and the write out is buffered too)


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