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SubjectRe: alpha iommu fixes
On Mon, May 21, 2001 at 02:30:09AM -0700, David S. Miller wrote:
> Andi Kleen writes:
> > On the topic of to the PCI DMA code: one thing I'm missing
> > are pci_map_single()/pci_map_sg() that take struct page * instead of
> > of direct pointers. Currently I don't see how you would implement IO-MMU IO
> > on a 32bit box with more than 4GB of memory, because the address won't
> > fit into the pointer.
> How does the buffer get there in the first place? :-)

I guess you know ;)

e.g. via page table tricks from user space, like the PAE mode on IA32
or via kmap.

> Certainly, when this changes, we can make the interfaces adapt to
> this.

I am just curious why you didn't consider that case when designing the
interfaces. Was that a deliberate decision or just an oversight?
[I guess the first, but why?]

> Because of this, for example, the sbus IOMMU stuff on sparc32 still
> uses HIGHMEM exactly because of this pointer limitation. In fact,
> any machine using >4GB of memory currently cannot be supported without
> highmem enabled, which is going to enable bounce buffering in the block
> I/O layer, etc.

That's currently the case, but at least on IA32 the block layer must be
fixed soon because it's a serious performance problem in some cases
(and fixing it is not very hard). Now that will probably first use DAC
and not a IO-MMU, and thus not use the pci mapping API, but I would not be
surprised if people came up with IO-MMU schemes for it too.
[actually most IA32 boxes already have one in form of the AGP GART, it's just
not commonly used for serious things yet]

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