Messages in this thread | | | From | Mark Salisbury <> | Subject | Re: No 100 HZ timer ! | Date | Tue, 10 Apr 2001 08:19:59 -0400 |
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On Tue, 10 Apr 2001, David Schleef wrote: > i.e., the TSC, you have to use 8254 timer 0 as both the timebase > and the interval counter -- you end up slowly losing time because > of the race condition between reading the timer and writing a > new interval.
actually, I have an algorithm to fix that. (had to implement this on a system with a single 32 bit decrementer (an ADI21060 SHARC, YUK!)) the algorithm simulates a free spinning 64 bit incrementer given a 32 bit interrupting decrementer under exclusive control of the timekeeping code. it also takes into account the read/calculate/write interval.
> It would be nice to see any redesign in this area make it more > modular. I have hardware that would make it possible to slave > the Linux system clock directly off a high-accuracy timebase, > which would be super-useful for some applications. I've been > doing some of this already, both as a kernel patch and as part > of RTAI; search for 'timekeeper' in the LKML archives if interested. > > > > > dave... -- /*------------------------------------------------** ** Mark Salisbury | Mercury Computer Systems ** ** mbs@mc.com | System OS - Kernel Team ** **------------------------------------------------** ** I will be riding in the Multiple Sclerosis ** ** Great Mass Getaway, a 150 mile bike ride from ** ** Boston to Provincetown. Last year I raised ** ** over $1200. This year I would like to beat ** ** that. If you would like to contribute, ** ** please contact me. ** **------------------------------------------------*/
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