Messages in this thread |  | | Date | Fri, 12 Oct 2001 19:04:46 -0700 (PDT) | From | Linus Torvalds <> | Subject | Re: [Lse-tech] Re: RFC: patch to allow lock-free traversal of lists with insertion |
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On Fri, 12 Oct 2001, Davide Libenzi wrote: > > The problem is that even if cpu1 schedule the load of p before the > load of *p and cpu2 does a = 1; wmb(); p = &a; , it could happen that > even if from cpu2 the invalidation stream exit in order, cpu1 could see > the value of p before the value of *p due a reordering done by the > cache controller delivering the stream to cpu1.
Umm - if that happens, your cache controller isn't honouring the wmb(), and you have problems quite regardless of any load ordering on _any_ CPU.
Ehh?
Linus
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