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SubjectRe: ioremap_nocache problem?
** Reply to message from David Wragg <dpw@doc.ic.ac.uk> on 24 Jan 2001 00:50:20
+0000

> (x86 processors with PAT and IA64 can set write-combining through page
> flags. x86 processors with MTRRs but not PAT would need a more
> elaborate implementation for write-combining.)

What is PAT? I desperately need to figure out how to turn on write combining
on a per-page level. I thought I had to use MTRRs, but now you're saying I can
use this "PAT" thing instead. Please explain!


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Timur Tabi - ttabi@interactivesi.com
Interactive Silicon - http://www.interactivesi.com

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