Messages in this thread | | | Subject | Re: ioremap_nocache problem? | From | David Wragg <> | Date | 24 Jan 2001 01:01:29 +0000 |
| |
Timur Tabi <ttabi@interactivesi.com> writes: > ** Reply to message from Roman Zippel <zippel@fh-brandenburg.de> on > Tue, 23 Jan 2001 19:12:36 +0100 (MET) > > ioremap creates a new mapping that shouldn't interfere with MTRR, > >whereas you can map a MTRR mapped area into userspace. But I'm not > >sure if it's correct that no flag is set for boot_cpu_data.x86 <= > >3... > > I was under the impression that the "don't cache" bit that > ioremap_nocache sets overrides any MTRR.
Nope. There's a table explaining how page flags and MTRRs interact in the Intel x86 manual, volume 3 (it's in section 9.5.1 "Precedence of Cache Controls" in the fairly recent edition I have here).
For example, with PCD set, PWT clear, and the MTRRs saying WC, the effective memory type is WC. In addition, there's a note saying this may change in future models. So you have to set PCD | PWT if you want to get uncached in all cases.
David Wragg - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org Please read the FAQ at http://www.tux.org/lkml/
| |