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SubjectRe: Inefficient PCI DMA usage (was: [experimental patch] UHCI updates)
Russell King wrote:
>
> Johannes Erdfelt writes:
> > They need to be visible via DMA. They need to be 16 byte aligned. We
> > also have QH's which have similar requirements, but we don't use as many
> > of them.
>
> Can we get away from the "16 byte aligned" and make it "n byte aligned"?
> I believe that slab already has support for this?
>

Not yet, but that would be a 2 line patch (currently it's hardcoded to
BYTES_PER_WORD align or L1_CACHE_BYTES, depending on the HWCACHE_ALIGN
flag).

But there are 2 other problems:
* kmem_cache_alloc returns one pointer, pci_alloc_consistent 2 pointers:
one dma address, one virtual address.
* The code relies on the virt_to_page() macro.

The second problem is the difficult one, I don't see how I could remove
that dependency without a major overhaul.

--
Manfred
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