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SubjectRe: Inefficient PCI DMA usage (was: [experimental patch] UHCI updates)
Russell King wrote:
> Manfred Spraul writes:
> > Not yet, but that would be a 2 line patch (currently it's hardcoded to
> > BYTES_PER_WORD align or L1_CACHE_BYTES, depending on the HWCACHE_ALIGN
> > flag).
> I don't think there's a problem then. However, if slab can be told "I want
> 1024 bytes aligned to 1024 bytes" then I can get rid of
> arch/arm/mm/small_page.c (separate problem to the one we're discussing
> though) ;)

That's easy, I'll include it in my next slab update.

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