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SubjectRe: Inefficient PCI DMA usage (was: [experimental patch] UHCI updates)
On Sat, Jan 20, 2001, Manfred Spraul <> wrote:
> >
> > TD's are around 32 bytes big (actually, they may be 48 or even 64 now, I
> > haven't checked recently). That's a waste of space for an entire page.
> >
> > However, having every driver implement it's own slab cache seems a
> > complete waste of time when we already have the code to do so in
> > mm/slab.c. It would be nice if we could extend the generic slab code to
> > understand the PCI DMA API for us.
> >
> I missed the beginning of the thread:
> What are the exact requirements for TD's?
> I have 3 tiny updates for mm/slab.c that I'll send to Linus as soon as
> 2.4 has stabilized a bit more, perhaps I can integrate the code for USB.

They need to be visible via DMA. They need to be 16 byte aligned. We
also have QH's which have similar requirements, but we don't use as many
of them.


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