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On Thu, 14 Sep 2000, Andrew Morton wrote:

> But for 3c59x (which is not a very efficient driver (yet)), it takes 6
> usecs to even get into the ISR, and around 4 uSecs to traverse it.
> Guess another 4 to leave the ISR, guess half as much again for whoever
> got interrupted to undo the resulting cache pollution.
>
> That's 20 usec per interrupt, of which 1 usec could be saved by skb
> pooling.
>

With these numbers + how long it takes to queue the packets in
netif_rx(); i would say you roughly should be able to tune your DMA
ring appropriately.

Roughly your DMA ring should be able to hold:

(PCI_Burst_bandwidth*((20*10-6)+pci_bus_latency))) bits.

Did i hear Donald say something? ;->

>
> If you don't do Rx interrupt mitigation there's no point in event
> thinking about skb pooling.
>

FF does not use mitigation and as Robert was pointing out this was adding
a lot of value.

cheers,
jamal

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