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Subject64bit BAR bug in pci.c

I believe I've come across a small piece of broken code for 64bit BAR
support in drivers/pci/pci.c. In the function pci_read_bases(), after
we determine we have a 64bit BAR we read the upper 32bits into variable
l.
We then get the size mask and save it into variable tmp. However, we
then go back and use l to calculate the new size of the range. I
propose
the diff below to fix this. I'm unable to test this code, but if anyone
can, I'd appreciate some feedback. I'm not on the linux-kernel list,
so please be sure I'm cc'd on any follow up. Thanks,

Alex Williamson

--
Alex Williamson
awilliam@fc.hp.com


--- linux/drivers/pci/pci.c Mon Jun 19 14:42:38 2000
+++ linux-pcifix/drivers/pci/pci.c Mon Aug 28 16:52:37 2000
@@ -518,8 +518,8 @@
pci_write_config_dword(dev, reg+4, ~0);
pci_read_config_dword(dev, reg+4, &tmp);
pci_write_config_dword(dev, reg+4, l);
- if (l)
- res->end = res->start + (((unsigned long) ~l) << 32);
+ if (tmp)
+ res->end = res->start + (((unsigned long) ~tmp) << 32);
#else
if (l) {
printk(KERN_ERR "PCI: Unable to handle 64-bit address for device
%s\n", dev->slot_name);

--
Alex Williamson
awilliam@fc.hp.com
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