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SubjectRe: AMD aa64 architecture.
Hi!

> AMD's specs for their new 64bit processor are out now, and on
> http://www.sandpile.org
>
> This processor is a 64 bit extension of the Intel x86 ia32 architecture.
> I had a look at the stuff and it looks very cool.
>
> Anyone start porting Linux to the new chip yet? Since Red Hat has an ia64
> port allready in beta for a chip that isn't available yet, I thought it
> would be very cool if the same were to occur for The AMD aa64 architecture
> as well.
>
> A while back when someone mentioned it, I believe Alan Cox said it would
> be very easy to add native 64 bit Linux support for AMD's new chip. I am
> just wondering if anyone had NDA and was working on it, or now that it is
> out people can start working on it. It would be very cool to see it added
> sometime soon. The chip appears to be incredibly backward compatible, and
> has many new registers (16 64bit regs + the usual register overlapping
> down to 32/16/8, etc...) I'm sure x86 software will fly bigtime on this
> new processor both legacy 32bit as well as new 64 bit stuff.
>
> Anyone know of a URL of anyone working on this port?

Jan Hubicka has untested port of binutils+gcc, I tried to write code
to kick cpu into long mode, but that's about all. There's no silicon
available, and not even emulator available just now, that makes it
pretty hard to port.

Apply this patch and feel ahead of time ;-).

--- clean/arch/i386/kernel/setup.c Sun Jul 30 20:11:52 2000
+++ linux/arch/i386/kernel/setup.c Thu Aug 3 13:11:15 2000
@@ -1366,6 +1366,11 @@
"Athlon", NULL, "Athlon", NULL,
NULL, NULL, NULL,
NULL, NULL, NULL, NULL, NULL, NULL, NULL }},
+ { X86_VENDOR_AMD, 7,
+ { "?hammer0", "?hammer1",
+ "?hammer2", "?hammer3", "?hammer4", "?hammer5",
+ NULL, NULL, NULL,
+ NULL, NULL, NULL, NULL, NULL, NULL, NULL }},
{ X86_VENDOR_UMC, 4,
{ NULL, "U5D", "U5S", NULL, NULL, NULL, NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL, NULL, NULL }},
@@ -1623,12 +1628,13 @@
"fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce",
"cx8", "apic", "10", "sep", "mtrr", "pge", "mca", "cmov",
"16", "pse36", "psn", "19", "20", "21", "22", "mmx",
- "24", "xmm", "26", "27", "28", "29", "30", "31"
+ "24", "xmm", "26", "27", "28", "64bit", "30", "31"
};
struct cpuinfo_x86 *c = cpu_data;
int i, n;

for (n = 0; n < NR_CPUS; n++, c++) {
+ extern int use_tsc;
#ifdef CONFIG_SMP
if (!(cpu_online_map & (1<<n)))
continue;
Pavel
--
I'm pavel@ucw.cz. "In my country we have almost anarchy and I don't care."
Panos Katsaloulis describing me w.r.t. patents at discuss@linmodems.org

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