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SubjectRe: Cache coherency... and locking
Date
In message <39783869.382726BA@colorfullife.com> you write:
> I'm interested in the ordering of atomic_xy and bit operations: I heard
> that they must be full memory barriers, but at least the ia64 port only
> uses a partial memory barrier.

From kernel-locking.tmpl:
Any atomic operation is defined to act as a memory barrier
(ie. as per the <function>mb()</function> macro).

If people are building locks with the test_* bitops and atomic_*_test
functions, we only need a partial barrier requirement as spin_lock().
This implies non-test atomic ops must have same barrier properties as
spin_unlock().

Alan? Does it make sense to weaken this restriction?
Rusty.
--
Hacking time.

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