Messages in this thread Patch in this message | | | Date | Sun, 26 Mar 2000 00:10:36 +0100 | From | Martin Mares <> | Subject | Re: 2.3.99-pre3 pcmcia cardbus patch, PCI questions |
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Hello!
> While diagnosing this problem, I spotted a couple of bits of code that > worry me in arch/i386/kernel/pci-i386.c. In pcibios_update_resource, > line 104 we have > > new = res->start | (res->flags & PCI_REGION_FLAG_MASK); > > When the region type is I/O, that sets the LSB on the new register > value, e.g. an I/O address of 0x1400 is written to register 0x10 as > 0x1401. Is that correct?
Yes.
Actually, this should not matter since the region flag bits are defined as read-only in PCI specs, but it turns out that it really matters as there exist devices which implement them read-write and initialize the right values in firmware (!).
> pcibios_enable_resources loops from idx = 0 to idx < 6 to work out > which flags to set for PCI_COMMAND. In the unlikely event of a card > which has I/O, no memory but has expansion ROM then PCI_COMMAND will > only be set to PCI_COMMAND_IO, PCI_COMMAND_MEMORY will not be set. > Should enable resources check idx <= 6 instead of id < 6, just in case?
You're right, it should check the ROM resource as well, but not the same way since it's perfectly normal that the ROM resource is unassigned. This patch should fix it.
--- arch/i386/kernel/pci-i386.c.mj Thu Mar 16 13:26:27 2000 +++ arch/i386/kernel/pci-i386.c Sun Mar 26 00:05:43 2000 @@ -317,5 +317,7 @@ if (r->flags & IORESOURCE_MEM) cmd |= PCI_COMMAND_MEMORY; } + if (dev->resource[PCI_ROM_RESOURCE].start) + cmd |= PCI_COMMAND_MEMORY; if (cmd != old_cmd) { printk("PCI: Enabling device %s (%04x -> %04x)\n", dev->slot_name, old_cmd, cmd); About expansion ROM's themselves:
I don't believe it can make a difference -- unless you're writing your own program which really runs the firmware in the ROM, there is nobody who could use the contents of the ROM. Also, you can easily check it by specifiying "pci=rom" on the kernel command line which makes the kernel assign address space to all the ROM's.
Also, it is NOT possible to enable the ROM's by default. The PCI specs allow the ROM address decoder to be shared with one of the decoders for the I/O or memory regions, so that when the ROM is enabled, you have no guarantee the other regions will be accessible. One can say this is just a stupidity of the specs, but believe me, there really exist such devices.
Have a nice fortnight -- Martin `MJ' Mares <mj@ucw.cz> <mj@suse.cz> http://atrey.karlin.mff.cuni.cz/~mj/ "Everything counts in large amounts." -- Depeche Mode
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