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SubjectRe: missing mxcsr initialization
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X-Comment-To: Alan Cox <alan@lxorguk.ukuu.org.uk>
Disclaimer: Not speaking for Transmeta in any way, shape, or form.
Copyright: Copyright 2000 H. Peter Anvin - All Rights Reserved

Followup to: <E13oy7T-00043v-00@the-village.bc.nu>
By author: Alan Cox <alan@lxorguk.ukuu.org.uk>
In newsgroup: linux.dev.kernel
>
> > > corrected for include the facts that the XMM feature bit is an Intel specific
> > > bit that other vendors may use for other things, so you need to test vendor ==
> > ^^^
> > Note that they shouldn't do that! I would consider a very bad thing if they
> > goes out of sync on those bits.
>
> CPUID is vendor specific. Every bit in those fields is vendor specific. Every
> piece of documentation tells you to check the CPU vendor. Every time we didnt
> bother we got burned.
>
> I keep hearing people saying things like 'bad thing' 'assume standards'. Well
> all I can say is cite a vendor issued document which says 'dont bother checking
> the vendor'.
>

Intel does it because they want every other chip out there to act like
a 486.

>
> And when you can't find that document, put the checks in so we dont crash on
> an Athlon or when using MTRR on a Cyrix III etc
>

Chips that don't implement what they claim to implement are buggy and
should be treated as such. SPECIAL-CASE THE BUGGY CHIPS, NOT THE
PROPERLY FUNCTIONING ONES.

-hpa


--
<hpa@transmeta.com> at work, <hpa@zytor.com> in private!
"Unix gives you enough rope to shoot yourself in the foot."
http://www.zytor.com/~hpa/puzzle.txt
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